Complementary bipolar transistor circuits have been found to yield excellent switching characteristics because a PNP bipolar transistor can be used as an active load device for an active NPN bipolar transistor in a complementary bipolar inverter circuit. The problem with complementary bipolar circuits in the prior art is that their formation on a single integrated circuit chip requires more complex processing steps than would be required for an integrated circuit employing either all PNP type or all NPN type transistors. Device structures have been devised in the prior art employing a vertical NPN bipolar transistor and a lateral PNP bipolar transistor in the same integrated circuit chip. Process steps required to make such a structure are less complex than those for prior art vertical PNP and NPN transistors on the same semiconductor chip; however the switching characteristics of the resulting lateral PNP transistor are not nearly as excellent as are those of the NPN transistor produced by said processes. In addition, a lateral PNP transistor occupies a greater chip area than does a simple vertical PNP bipolar transistor.
It has been suggested in the prior art that a vertical PNP structure be formed within the P-type base region of what would have otherwise been a vertical NPN transistor in an integrated circuit, such as is shown in FIG. 1A. As shown in FIG. 1A, a conventional NPN bipolar transistor is formed by producing in the epitaxial layer 4 on the substrate 2, a P-type base region 6 into which an N-type emitter region 8 is introduced, with an N-type collector contact 10 connected to the N-type epitaxial region 4. P-type isolation regions 12 and an N-type subcollector region 14 may also be included in the structure. On the same integrated circuit substrate 2, another P-type region 6' which would have been the base region of an NPN vertical bipolar transistor, is used, instead, as the collector region 4 of PNP vertical bipolar transistor. In this structure, as shown in FIG. 1A, an N-type base region 16 is formed in the P-type collector region 6' followed by the introduction of a shallow P-type emitter region 18 in the base region 16. A base contact 20 of N-type conductivity may also be introduced into the base region 16. The resulting PNP structure 22 is compatible with the NPN vertical bipolar transistor process employed in making the NPN transistor 24, however severe switching problems occur with the PNP device 22 due to the relatively high collector resistance and a relatively low breakdown voltage between the collector 6' and base 16 due to the necessity of compensating for four different overlaid, doped regions. The excessive concentration of dopant atoms in the base region 16 and emitter region 18 distort the semiconductor lattice so as to reduce the mobility of minority charge carriers injected from the emitter into the base region and to increase the recombination rate of the minority carriers due to the formation of trapping centers in the base region.